Inverting amplifier having a low noise biasing network

ABSTRACT

An operational amplifier with reduced bias circuit noise. The present invention reduces the noise contribution of the non-inverting input bias circuit. This noise reduction is accomplished by reducing the bandwidth of the bias circuit by bypassing high frequencies to signal ground. This reduces the noise voltage developed across the bias circuit and thereby reduces the noise at the output of the amplifier.

FIELD OF THE INVENTION

The present invention relates to solid state signal amplifiers. Inparticular, this invention relates to a biasing method for operationalamplifiers which reduces the noise produced by the non-inverting biasnetwork.

BACKGROUND OF THE INVENTION

Operational amplifiers have been used in the electronics industry formany years. These amplifiers are constructed using integrated circuitmethods and are packaged in integrated circuit casings or in packagessimilar to those used for discrete transistors. They provide aninexpensive and convenient way to amplify signals with a minimum ofdiscrete parts.

When amplifying small signals, care must be taken to minimize circuitnoise. As the amplitude of the input signal to an amplifier isdecreased, the amount of circuit noise that can be tolerated alsodecreases. For example, if the input signal voltage is 1 voltpeak-to-peak, then a circuit noise level of 100 micro-volts (uV) is oflittle consequence. However if the input signal voltage is 50 uV, then acircuit noise level of 100 uV swamps out the desired signal making theamplifier useless. Therefore great care is taken to ensure that inputvoltage noise (V₁₃ noise) of a small signal operational amplifier isminimized. But other devices also contribute to the circuit noise.

The source, biasing and feedback resistors associated with an amplifiereach contribute to the circuit noise due to two phenomena. First thereis "Johnson Noise" and second there is noise generated by the inputcurrent to the amplifier.

Due to Johnson Noise, each resistor generates a voltage noise equal to"sqrt(4 KTR)" volts per root Hertz (Hz). In the Johnson noise equation,"K" is Boltzman's constant, "T" is the temperature in degrees Kelvin and"R" is the resistance in ohms.

The inputs of an amplifier produce a noise current (I₁₃ noise). As thisnoise current flows through resistors attached to the amplifier inputs,a noise voltage is generated across the resistors. The magnitude of thenoise voltage is (I₁₃ noise*R). The noise generated across the inputbiasing resistor of an inverting amplifier can be a significant or evendominant noise source for the amplifier.

FIG. 1 illustrates a prior art small signal operational amplifier. Theoperational amplifier 101 has a non-inverting input 103 and an invertinginput 105. A biasing resistor "R3" 107 is connected in series betweenthe non-inverting input 103 and a signal ground. A feedback resistor"R2" 109 is connected between the inverting input 105 and an output 111of the operational amplifier 101. Connected in series between a voltageinput source 113 and the inverting input 105 is an input resistor "R1"115 and a coupling capacitor "C1" 117.

The inputs of an amplifier require an input bias current to ensure azero direct current (DC) offset voltage at the amplifier output 111. Inthe example illustrated in FIG. 1, the inverting and non-inverting inputbias currents of the amplifier are assumed to be matched. Resistors 107and 109 are equal, 5000 ohms (5K), to ensure a zero DC offset at theamplifier output due to input bias currents.

The equivalent input noise voltage per root Hz of the circuit for afrequency (f) much greater than determined by the formula"f=1/2*3.142*C1*R1" is given by the formula:

    sqrt (V.sub.13 noise.sup.2 +(I.sub.13 noise (R1*R2/(R1+R2))).sup.2 +4KT(R1*R2/(R1+R2))+(I.sub.13 noise*R3).sup.2 +4KT(R3))

Since R3 is greater than (R1*R2/(R1+R2)), then the noise contributionsof R3 (107) exceed those of R1 (115) and R2 (109). If V₁₃ noise is smallthen the noise contributions of the input biasing resistor R3 can be thedominant source of noise in the amplifier.

Two prior art methods have been used to reduce the noise contribution ofthe non-inverting input resistor. The first method reduces thenon-inverting input biasing resistor value and the second method reducesthe values of the input, feedback and non-inverting biasing resistor.Both methods have disadvantages.

In the first method, if the non-inverting input bias resistor R3 (107)is reduced, then both the Johnson and input current noise contributionsrelated to R3 are reduced. However, if the value of the input biasingresistor R3 alone is reduced, then it's value will no longer match theDC impedance at the inverting input R2. When the inverting andnon-inverting input impedances no longer match at DC, then the inputbias currents of the amplifier are no longer compensated and a finiteoutput voltage will result. This is an undesirable result as the outputvoltage 119 will no longer be zero for a zero input voltage (an outputoffset voltage is created).

In the second method, if all of the resistors R1, R2 and R3 are allreduced in value, then the input bias currents will still be balancedand the output of the amplifier will still be zero for a zero inputvoltage. However reducing the input resistor may not be desirable sincethe input impedance of the amplifier may be too low for the inputvoltage source.

Therefore what is needed in the industry is a method for reducing thenoise contribution from the non-inverting bias resistor withoutdecreasing the input impedance of the amplifier or creating an offsetoutput voltage.

SUMMARY OF THE INVENTION

The present invention reduces the noise contribution of thenon-inverting input bias circuit. This noise reduction is accomplishedby reducing the bandwidth of the bias circuit. The bias circuit isdesigned to have low bandwidth so that at high frequencies, theimpedance of the circuit is low. Therefore, less noise voltage developsacross the circuit and there is less overall system noise.

To effect the desired reduction in bandwidth, a high frequency bypassdevice is placed in parallel with the non-inverting input bias circuit.Typically, this device is a capacitor appropriately sized to present alow impedance at high frequencies. Since this is a parallel circuit, thelowest impedance parallel component, in this case the capacitor,determines the maximum impedance as seen from the non-inverting input.So the maximum noise voltage that can be generated is determined by theimpedance of the capacitor which is much less than the impedance of thenon-inverting bias network alone.

This bypass method provides for a low non-inverting input noise levelwhile eliminating the need to either lower the amplifier inputresistance or creating an output offset voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a prior art inverting operational amplifier circuit.

FIG. 2 illustrates the present invention where a high frequency bypassis placed in parallel with the non-inverting input bias circuit.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2 illustrates the operational amplifier of FIG. 1 modifiedaccording to the present invention. This amplifier is particularlyuseful over a frequency range of 100KHz to 10MHz. As illustrated, a highfrequency bypass capacitor C2 (201) is placed in parallel with thenon-inverting bias resistor R3 (107). C2 reduces the noise contributionof the non-inverting bias circuit at high frequencies(f>1/2*3.142*R3*C2).

At DC (0 Hz), the impedance of the input non-inverting bias circuit (R3and C2) matches that of the impedance at the amplifier's inverting input105. That is the value of R2 equals the value of R3. As the impedance ofthe parallel combination of the input and feedback networks issubstantially the same as thee impedance of the non-inverting input biascircuit at DC, the amplifier output 119 still has essentially a zerooffset voltage for a zero input voltage. The non-inverting input biascircuit is designed to have a low bandwidth so that at high frequenciesthe impedance of the circuit is low. At frequencies above the bandwidthof the non-inverting input bias circuit, the noise contribution of thiscircuit is reduced when compared to the bias circuit of FIG. 1. For thecircuit illustrated in FIG. 2, the noise contributions of thenon-inverting input bias circuit (C2 and R3 ) are given by the formulas:

    Johnson Noise=sqrt(4KT*R3/(1+(2*3.142*f*R3*C2).sup.2)) volts per root Hz.

    Input Current Noise=I.sub.13 noise*R3/(1+2*3.142*f*R*C2) volts per root Hz.

Where f is the input signal frequency.

At frequencies above the bandwidth of the non-inverting input biascircuit (f >1/2*3.142*R3*C2), the Johnson Noise and the Input CurrentNoise associated with the non-inverting input bias circuit rapidlydecrease.

The addition of the high frequency bypass capacitor C2 (201) reduces thebandwidth of the non-inverting input bias circuit and thereby reducesthe noise at the amplifier output.

The present invention, by reducing the bandwidth of the non-invertinginput Input Current Noise=I₋₋ noise*R3/sqrt(1+(2*3.142*f*R3*C2) 2) voltsper root Hz without introducing an offset voltage at the amplifieroutput due to unbalanced input bias currents and without reducing thevalue of the feedback or input resistors of the amplifier.

While a preferred embodiment of the invention has been described, otherembodiments of the invention will be apparent to those skilled in theart from a consideration of this specification or practice of theinvention disclosed herein. Therefore it is intended that thespecification and example be considered as exemplary only, with thescope of the invention being defined by the following claims.

I claim:
 1. An operational amplifier apparatus, having an output andhaving an inverting input and a non-inverting input, comprising:afeedback network from the output to the inverting input; an inputnetwork in series between an input signal source and the invertinginput; a non-inverting input bias circuit, having an inherent impedanceat a particular frequency, connected in series between the non-invertinginput and a reference voltage level; a high frequency bypass deviceconnected in parallel across the non-inverting input bias circuit; andthe high frequency bypass device has a lower inherent impedance at theparticular frequency than the non-inverting input bias circuit such thatthe combined impedance of the non-inverting bias circuit and the highfrequency bypass device is less than the inherent impedance of thenon-inverting bias circuit at the particular frequency, reducing thebandwidth of said non-inverting input bias circuit, and thereby limitingthe amount of noise voltage developed across the non-inverting inputbias circuit for a particular noise current flowing into thenon-inverting input of the operational amplifier and thereby reducingthe Johnson noise generated by the non-inverting input bias circuit. 2.An operational amplifier apparatus as in claim 1 wherein: the highfrequency bypass device is a capacitor.
 3. An operational amplifierapparatus as in claim 1 wherein:at DC (0 Hz) the impedance of theparallel combination of the input and feedback networks is substantiallythe same as the impedance of the non-inverting input bias circuit at DC,such that the output of the operational amplifier has essentially a zerooffset voltage for a zero input voltage.
 4. An operational amplifierapparatus, having an output and having an inverting input and anon-inverting input, comprising:a non-inverting input bias circuit,having an inherent impedance at a particular frequency, connected inseries between the non-inverting input and a reference voltage level; afeedback network connected between the output and the inverting input;an input network in series between an input signal source and theinverting input such that at DC (0 Hz) the impedance of the parallelcombination of the input and feedback networks is substantially the sameas the impedance of the non-inverting input bias circuit at DC; acapacitor C1 connected in parallel across the non-inverting input biascircuit; and the capacitor has a lower inherent impedance at theparticular frequency than the non-inverting input bias circuit such thatthe combined impedance of the non-inverting bias circuit and thecapacitor is less than the inherent impedance of the non-inverting biascircuit at the particular frequency, reducing the bandwidth of saidnon-inverting input bias circuit, and thereby limiting the amount ofnoise voltage developed across the non-inverting input bias circuit fora particular noise current flowing into the non-inverting input of theoperational amplifier and thereby reducing the Johnson noise generatedby the non-inverting input bias circuit.
 5. An operational amplifierapparatus as in claim 4 wherein:the non-inverting bias circuit includesa resistor R1 connected in series between the non-inverting input andthe reference voltage level; and the particular frequency is a frequency(f) greater than f=(1/23.142*R1*C1).
 6. An operational amplifierapparatus, having an output and having an inverting input and anon-inverting input, comprising:a feedback network from the output tothe inverting input; an input network in series between an input signalsource and the inverting input; a non-inverting input bias circuit,having an inherent impedance at a particular frequency, connected inseries between the non-inverting input and a reference voltage level; ahigh frequency bypass device connected in parallel across thenon-inverting input bias circuit; and the high frequency bypass devicehas a lower inherent impedance at the particular frequency than thenon-inverting input bias circuit such that the combined impedance of thenon-inverting bias circuit and the high frequency bypass device is lessthan the inherent impedance of the non-inverting bias circuit at theparticular frequency thereby limiting the amount of noise voltagedeveloped across the non-inverting input bias circuit for a particularnoise current flowing into the non-inverting input of the operationalamplifier and thereby reducing the Johnson noise generated by thenon-inverting input bias circuit; wherein at DC (0 Hz) the impedance ofthe parallel combination of the input and feedback networks issubstantially the same as the impedance of the non-inverting input biascircuit at DC, such that the output of the operational amplifier hasessentially a zero offset voltage for a zero input voltage.
 7. Anoperational amplifier apparatus, having an output and having aninverting input and a non-inverting input, comprising:a non-invertinginput bias circuit, having an inherent impedance at a frequency (f)greater than f=(1/2*3.142*R1*C1), and including a resistor R1 connectedin series between the non-inverting input and a reference voltage level;a feedback network connected between the output and the inverting input;an input network in series between an input signal source and theinverting input such that at DC (0 Hz) the impedance of the parallelcombination of the input and feedback networks is substantially the sameas the impedance of the non-inverting input bias circuit at DC; acapacitor C1 connected in parallel across the non-inverting input biascircuit; and the capacitor has a lower inherent impedance at theparticular frequency than the non-inverting input bias circuit such thatthe combined impedance of the non-inverting bias circuit and thecapacitor is less than the inherent impedance of the non-inverting biascircuit at the particular frequency thereby limiting the amount of noisevoltage developed across the non-inverting input bias circuit for aparticular noise current flowing into the non-inverting input of theoperational amplifier and thereby reducing the Johnson noise generatedby the non-inverting input bias circuit.